Job Description:
PDC Platform Validation team are specifically chartered to perform post silicon validation on Intel’s next generation platform including CPU, chipset, SOC and board using custom-designed hardware and software. As a senior validation engineer you will be working very closely with Design Engineers and other Engineering discipline on future Intel leading edge products to ensure the high quality and reliability that Intel known for. These activities include but not limited to: defining and driving the implementation of debug hooks, Design for validation (DFV), Design for Testability (DFT), develop customized content based on coverage needs and Intel architect (IA) design.

Requirement
B. Sc/ B. Engr/ Master of Sc/ Engr or PhD in Electrical Engineering, Electronics, Computer Engineering. For Bachelor degree, we need minimum 7 years of relevant working experience; Master and PhD minimum 5 years working experience. The candidate needs to be familiar with PC platform architecture, VLSI CMOS logic design and good understanding of analog circuit and semiconductor device physics. The candidate should have strong analytical skills, be able to work independently and work at various levels of abstraction from concept to details. Excellent communication skills and strong initiative are highly valued. A track record of successful execution of complex development/integration projects is desired.

Career and Compensation
Join us to build your engineering career in the Design and Development of the next generation Intel® Core processors, Advanced IA Chipsets and System-On-Chip (SOC) solutions. Attractive compensation and benefit is awaiting qualified candidates. That will include International Relocation Package and Children’s International School Assistance.

How to Apply:
To apply, create your profile at www.intel.com/jobs and send a copy of your resume  grp_intel_pakistan@intel.com to by 30 Apr 2010!

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